Algoritmi | User | Cristiano António Azevedo Rodrigues
Cristiano António Azevedo Rodrigues
Cristiano António Azevedo Rodrigues
At Algoritmi
Academic Degree
Graduate
Current Position
Other at Escola de Engenharia da Universidade do Minho
Personal Webpage
Personal Email
a75445@alunos.uminho.ptOrcid
0000-0001-7360-345XResearcher ID
E-2208-2019Ciência ID
561F-218D-80CEGoogle Scholar
h-index
3Publications
6Editorial
0Citations
33Q1 / Q2
1About Me 
Cristiano Rodrigues is a Ph.D. candidate at the University of Minho in Portugal. Cristiano is a driven and skilled individual with extensive expertise in hardware/software co-design, safety-critical systems, microcontrollers, Armv8-M TrustZone, and embedded security for IoT-based systems. He holds a master's degree in Electronic and Computer Engineering, where he developed a cutting-edge fault-tolerant mechanism for mixed-critical systems using FPGA technology. After enrolling in his Ph.D. program, Cristiano shifted his focus from safety to security and has since conducted research on the security of low-end embedded IoT devices, with a particular focus on software-based microarchitectural attacks. Cristiano had previously published at the prestigious security conference IEEE S&P and delivered a talk at Black Hat Asia '23 and '24.
Publications (11)
MCU-Wide Timing Side Channels and Their Detection
2024 | conference-paper
What the TrustZone-M Doesn't See, the MCU Does Grieve Over: Lessons Learned from Assessing a Microcontroller TEE
Black Hat Asia
2024 | lecture-speech
BUSted!!! Microarchitectural Side-Channel Attacks on the MCU Bus Interconnect
Proceedings - IEEE Symposium on Security and Privacy
2024 | conference-paper
Hand Me Your SECRET, MCU! Microarchitectural Timing Attacks on Microcontrollers are Practical
Black Hat Asia
2023 | lecture-speech
Busted Attack Website
2023 | website
MCU-Wide Timing Side Channels and Their Detection
arXiv
2023 | other
Lock-V: A heterogeneous fault tolerance architecture based on Arm and RISC-V
Microelectronics Reliability
2021 | journal-article
Towards a trusted execution environment via reconfigurable FPGA
arXiv
2021 | other
Arquitetura Heterogénea para Sistemas Tolerantes a Falhas Baseada em Arm e RISC-V
Conference: XV Jornadas sobre Sistemas Reconfiguráveis – REC’2019
2019 | conference-paper
Deploying a Real-Time Operating System on a Reconfigurable Internet of Things End-device
IECON Proceedings (Industrial Electronics Conference)
2019 | conference-paper
Towards a Heterogeneous Fault-Tolerance Architecture based on Arm and RISC-V Processors
IECON Proceedings (Industrial Electronics Conference)
2019 | conference-paper
Fundings (0)
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History
| Init | End | Change | Value |
|---|
MCU-Wide Timing Side Channels and Their Detection
2024 | conference-paper
What the TrustZone-M Doesn't See, the MCU Does Grieve Over: Lessons Learned from Assessing a Microcontroller TEE
Black Hat Asia
2024 | lecture-speech
BUSted!!! Microarchitectural Side-Channel Attacks on the MCU Bus Interconnect
Proceedings - IEEE Symposium on Security and Privacy
2024 | conference-paper
Hand Me Your SECRET, MCU! Microarchitectural Timing Attacks on Microcontrollers are Practical
Black Hat Asia
2023 | lecture-speech
Busted Attack Website
2023 | website
MCU-Wide Timing Side Channels and Their Detection
arXiv
2023 | other
Lock-V: A heterogeneous fault tolerance architecture based on Arm and RISC-V
Microelectronics Reliability
2021 | journal-article
Towards a trusted execution environment via reconfigurable FPGA
arXiv
2021 | other
Arquitetura Heterogénea para Sistemas Tolerantes a Falhas Baseada em Arm e RISC-V
Conference: XV Jornadas sobre Sistemas Reconfiguráveis – REC’2019
2019 | conference-paper
Deploying a Real-Time Operating System on a Reconfigurable Internet of Things End-device
IECON Proceedings (Industrial Electronics Conference)
2019 | conference-paper
Towards a Heterogeneous Fault-Tolerance Architecture based on Arm and RISC-V Processors
IECON Proceedings (Industrial Electronics Conference)
2019 | conference-paper
No title available
No journal available
No publication date available
No title available
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|---|---|---|---|---|
