A single chip FPGA-based solution for controlling of multi-unit PMSM motor with time-division multiplexing scheme

By Amornwongpeeti, S.; Ekpanyapong, M.; Chayopitak, N.; Monteiro, J.L.; Martins, J.S.;

Microprocessors and Microsystems

2015

Abstract

All rights reserved. The use of multiple unit controllers for parallel processing of multi-unit motor drive systems can significantly reduce the execution time of the control algorithm. However, this approach does not only increase the system cost but also incurs in additional cost of hardware and software interconnections. This paper presents a fully integrated single chip field programmable gate array (FPGA) based solution for controlling of an independent multi-unit permanent magnet synchronous motor (PMSM) drive system with space vector pulse width modulation (SVPWM) based vector control. For multi-unit motor systems, the complexity of control algorithms often exceeds the resource availability of low-cost FPGA devices. Thus, a system-level time-division multiplexing scheme applicable for multi-motor control systems is proposed. Using the proposed method, large identical complex control algorithms can be simplified into a single compact algorithm, which is fitted and configured into a low-cost FPGA. Simulation modeling and experimental results are shown, confirming the effectiveness of a multi-unit PMSM motor drive system using an inexpensive controller based on system-level time-division multiplexing scheme, which can operate simultaneously with robustness under different operating conditions.

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