A customizable and ARINC 653 quasi-compliant hypervisor (CPU and Memory virtualization)

By Tavares, A.; Carvalho, A.; Rodrigues, P.; Garcia, P.; Gomes, T.; Cabral, J.&semi

2012 IEEE International Conference on Industrial Technology, ICIT 2012, Proceedings

2012

Abstract

This paper presents a novel hypervisor, developed for aerospace applications using an object oriented approach that embodies time and space partitioning (TSP) on a PowerPC (PPC) core embedded in a FPGA, for the NetworkCentric core avionics [1] - an architecture of cooperating components and managed by a real-time operating system, to implement dependable computing and targeting simplicity. To support Integrated Modular Architecture (IMA) [2] partitioned software architectures, the proposed hypervisor adapted to the aerospace application domain the Popek and Goldberg's [3] fidelity, efficiency and resource control virtualization requirements, and extends them with additional ones like timing determinism, reactivity and improved dependability. A distinctive feature of this hypervisor is its I/O device virtualization approach that guarantees real-time performance and small trusted computing base. The object oriented approach will be particularly useful to customize key components of the hypervisor (with different granularity levels) such as partition scheduling and the communications manager using generative programming techniques (Aspect Oriented Programming (AOP) and template meta-programming).

RepositoriUM:

Google Scholar: